The forward gated-diode R-G current method is used to monitor the F-N stressing-induced interface traps of NMOSFET/SOI.This simp le and accurate experiment method can directly give the interface trap density i nduced ...The forward gated-diode R-G current method is used to monitor the F-N stressing-induced interface traps of NMOSFET/SOI.This simp le and accurate experiment method can directly give the interface trap density i nduced by F-N stressing effect for characterizing the device's reliability.For the measured NMOS/SOI device with a body structure,an expected power-law relati onship as Δ N it - t 0 4 between the pure F-N stressing-indu ced interface trap density and the accumulated stressing time is obtained.展开更多
A novel flash memory cell with stacked structure (Si substrate/SiGe quantum dotsunneling oxide/polySi floating gate) is proposed and demonstrated to achieve enhanced F-N tunneling for both programming and erasing. S...A novel flash memory cell with stacked structure (Si substrate/SiGe quantum dotsunneling oxide/polySi floating gate) is proposed and demonstrated to achieve enhanced F-N tunneling for both programming and erasing. Simulation results indicate the new structure provides high speed and reliability. Experimental results show that the operation voltage can be as much as 4V less than that of conventional full F-N tunneling NAND memory cells. Memory cells with the proposed structure can achieve higher speed, lower voltage, and higher reliability.展开更多
It is of great importance to establish the dam failure risk criteria for dam risk assessment and management. Presently, the F-N curve method is widely applied in practice, in which the F-N curves are used for establis...It is of great importance to establish the dam failure risk criteria for dam risk assessment and management. Presently, the F-N curve method is widely applied in practice, in which the F-N curves are used for establishing the criteria for separate risks caused by the dam failure in life, economy, environment, and society respectively. In this paper, in consideration of the overlying effect by two or more types of risk losses resulting from the dam failure at the same time, the F-N curved surface method is presented for establishing the integrated dam failure risk criteria. In this method, the named F-N curved surfaces are established, and by these curved surfaces, the acceptable, the allowable, and the unallowable integrated risk zones can be defined.展开更多
A clear correspondence between the gated-diode generation-recombination (R-G) current and the performance degradation of an SOI n-channel MOS transistor after F-N stress tests has been demonstrated. Due to the incre...A clear correspondence between the gated-diode generation-recombination (R-G) current and the performance degradation of an SOI n-channel MOS transistor after F-N stress tests has been demonstrated. Due to the increase of interface traps after F-N stress tests, the R-G current of the gated-diode in the SOI-MOSFET architecture increases while the performance characteristics of the MOSFET transistor such as the saturation drain current and sub-threshold slope are degraded. From a series of experimental measurements of the gated-diode and SOI-MOSFET DC characteristics, a linear decrease of the drain saturation current and increase of the threshold voltage as well as a like-line rise of the sub-threshold swing and a corresponding degradation in the trans-conductance are also observed. These results provide theoretical and experimental evidence for us to use the gated-diode tool to monitor SOI-MOSFET degradation.展开更多
摘要The forward gated-diode R-G current method is used to monitor the F-N stressing-induced interface traps of NMOSFET/SOI.This simp le and accurate experiment method can directly give the interface trap density i nduced by F-N stressing effect for characterizing the device's reliability.For the measured NMOS/SOI device with a body structure,an expected power-law relati onship as Δ N it - t 0 4 between the pure F-N stressing-indu ced interface trap density and the accumulated stressing time is obtained.
摘要A novel flash memory cell with stacked structure (Si substrate/SiGe quantum dotsunneling oxide/polySi floating gate) is proposed and demonstrated to achieve enhanced F-N tunneling for both programming and erasing. Simulation results indicate the new structure provides high speed and reliability. Experimental results show that the operation voltage can be as much as 4V less than that of conventional full F-N tunneling NAND memory cells. Memory cells with the proposed structure can achieve higher speed, lower voltage, and higher reliability.
基金supported by the National Natural Science Foundation of China (Grant No. 50779009)
摘要It is of great importance to establish the dam failure risk criteria for dam risk assessment and management. Presently, the F-N curve method is widely applied in practice, in which the F-N curves are used for establishing the criteria for separate risks caused by the dam failure in life, economy, environment, and society respectively. In this paper, in consideration of the overlying effect by two or more types of risk losses resulting from the dam failure at the same time, the F-N curved surface method is presented for establishing the integrated dam failure risk criteria. In this method, the named F-N curved surfaces are established, and by these curved surfaces, the acceptable, the allowable, and the unallowable integrated risk zones can be defined.
基金supported by the Special Funds for the State Key Development Program for Basic Research of China(973)the State Key Development Program for Basic Research of Chinathe National Natural Science Foundation of China (Nos.60976066,60936005)
摘要A clear correspondence between the gated-diode generation-recombination (R-G) current and the performance degradation of an SOI n-channel MOS transistor after F-N stress tests has been demonstrated. Due to the increase of interface traps after F-N stress tests, the R-G current of the gated-diode in the SOI-MOSFET architecture increases while the performance characteristics of the MOSFET transistor such as the saturation drain current and sub-threshold slope are degraded. From a series of experimental measurements of the gated-diode and SOI-MOSFET DC characteristics, a linear decrease of the drain saturation current and increase of the threshold voltage as well as a like-line rise of the sub-threshold swing and a corresponding degradation in the trans-conductance are also observed. These results provide theoretical and experimental evidence for us to use the gated-diode tool to monitor SOI-MOSFET degradation.