Traditional digitizers for signal readout of PET detectors are based on commercial analog-to-digital converters(ADC).However,the cost and power consumption of an entire electronic readout system based on digitizers fo...Traditional digitizers for signal readout of PET detectors are based on commercial analog-to-digital converters(ADC).However,the cost and power consumption of an entire electronic readout system based on digitizers for a PET scanner are high.To address this problem,a soft-core ADC based on a field-programmable gate array(FPGA)was proposed.An FPGA-based ADC(FPGA-ADC)combines low loss and high performance.To achieve good performance,the FPGA-ADC requires three calibrations:time-to-digital converter(TDC)length calibration,TDC alignment calibration,and TDC-to-ADC calibration.A prototype front-end electronics based on FPGA-ADC was built to evaluate the performance of time-of-flight positron emission tomography(TOF PET)detectors.Each PET detector consists of a LYSO crystal single-ended coupled to a silicon photomultiplier(SiPM).The experimental results show that the full-width at half-maximum(FWHM)energy resolution for 511 keV gamma photons after saturation correction of the SiPM was 12.3%.The FWHM coincidence timing resolution(CTR)of the TOF PET detector with the readout of the front-end electronic prototype is 385.2 ps.FPGA-ADCbased front-end electronics are very promising for multichannel,low-cost,highly integrated,and power-efficient readout electronic systems for radiation detector applications.展开更多
Traditionally,a continuous-wave(CW)signal is used to simulate RF circuits during the design procedure,while the fabricated circuits are measured by modulated signals in the test phase,because modulated signals are use...Traditionally,a continuous-wave(CW)signal is used to simulate RF circuits during the design procedure,while the fabricated circuits are measured by modulated signals in the test phase,because modulated signals are used in reality.It is almost impossible to use a CW signal to predict system performances,such as error vector magnitude(EVM),bit error rate(BER),etc.,of a transceiver front-end when dealing with complex modulated signals.This paper develops an integrated system evaluation engine(ISEE)to evaluate the system performances of a transceiver front-end or its sub-circuits.This crossdomain simulation platform is based on Matlab,advanced design system(ADS),and Cadence simulators to link the baseband signals and transceiver frond-end.An orthogonal frequency division multiplex(OFDM)modem is implemented in Matlab for evaluating the system performances.The modulated baseband signal from Matlab is dynamically fed into ADS,which includes transceiver front-end for co-simulation.The sub-block circuits of the transceiver front-end can be implemented using ADS and Cadence simulators.After system-level circuit simulation in ADS,the output signal is dynamically delivered to Matlab for demodulation.To simplify the use of the co-simulation platform,a graphical user interface(GUI)is constructed using Matlab.The parameters of the OFDM signals can be easily reconfigured on the GUI to simulate RF circuits with different modulation schemes.To demonstrate the effectiveness of the ISEE,a 3.5 GHz power amplifier is simulated and characterized using 20 MHz 16-and 64-QAM OFDM signals.展开更多
In response to the pain points of rapid iteration of front-end education technology,large differences in learner foundations,and a lack of practical scenarios,this paper combines generative artificial intelligence and...In response to the pain points of rapid iteration of front-end education technology,large differences in learner foundations,and a lack of practical scenarios,this paper combines generative artificial intelligence and AI agents to analyze the empowerment logic from three dimensions:knowledge ecology reconstruction,cognitive collaborative upgrading,and teaching methodology innovation.It explores its application scenarios in teaching and learning,sorts out challenges such as technology adaptation and learning dependence,and proposes paths such as building an exclusive AI ecosystem and optimizing the guidance mechanism of intelligent agents to provide support for the digital transformation of front-end education.展开更多
The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation f...The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation front-end for the RF station.For that application,a general-purpose design front-end prototype has been developed to evaluate the multi-frequency point supported design feasibility.The difficult parts to achieve the requirements of the general-purpose design are reasonable device selection and balanced design.With a carefully selected low-noise wide-band RF mixer and amplifier to balance the performance of multi-frequency supported down-conversion,specially designed LO distribution net to increase isolation between adjacent channels,and external band-pass filter to realize expected up-conversion frequencies,high maintenance and modular front-end generalpurpose design has been implemented.Results of standard parameters show an R2 value of at least 99.991%in the range of-60-10 dBm for linearity,up to 18 dBm for P1dB,and up to 89 dBc for cross talk between adjacent channels.The phase noise spectrum is lower than 80 dBc in the range of 0-1 MHz;cumulative phase noise is 0.006°;and amplitude and phase stability are 0.022%and 0.034°,respectively.展开更多
A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility.The parallel plate ionization chamber is used for the dose monitori...A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility.The parallel plate ionization chamber is used for the dose monitoring.Unlike the traditional method of recycling capacitor integration and voltage-to-frequency conversion,this dose monitor electronics uses the trans-impedance amplifier and analog-to-digital conversion method.It performs satisfactorily,with the integral nonlinearity of less than ±0.04 nA in the range of-400 to 50 nA and the resolution of about±0.6 nA.展开更多
An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considera...An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.展开更多
A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly red...A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.展开更多
In the digital era,how to ensure the authenticity and integrity of elec-tronic records has become an open challenging issue.Front-end control is an important concept as well as a basic principle in electronic record m...In the digital era,how to ensure the authenticity and integrity of elec-tronic records has become an open challenging issue.Front-end control is an important concept as well as a basic principle in electronic record management.Under the instruction of front-end control,many original management links in the record-management stage are required to move forward,and the managers enter the formation stage of the electronic records to ensure the originality.How-ever,the front-end control technique primarily focuses on transaction manage-ment,and it lacks the strategy of providing the control of electronic records.In this paper,a novel electronic record front-end control mechanism is proposed by adopting proxy re-encryption and requiring archivists to participate in the man-agement of electronic records before the record is created to solve the problem.Specifically,when an electronic record is generated,the proposed mechanism interacts with the producer of the electronic record to generate a corresponding encryption key.Moreover,electronic records are encrypted by the key to protect their confidentiality,which can prevent the leakage of electronic record informa-tion.In addition,when transferring the electronic record,archivists use proxy re-encryption technology to convert electronic records,allowing management by an archivist,ensuring their originality and authenticity.展开更多
The way towards generating a website front end involves a designersettling on an idea for what kind of layout they want the website to have, thenproceeding to plan and implement each aspect one by one until they havec...The way towards generating a website front end involves a designersettling on an idea for what kind of layout they want the website to have, thenproceeding to plan and implement each aspect one by one until they haveconverted what they initially laid out into its Html front end form, this processcan take a considerable time, especially considering the first draft of the designis traditionally never the final one. This process can take up a large amountof resource real estate, and as we have laid out in this paper, by using a Modelconsisting of various Neural Networks trained on a custom dataset. It can beautomated into assisting designers, allowing them to focus on the other morecomplicated parts of the system they are designing by quickly generating whatwould rather be straightforward busywork. Over the past 20 years, the boomin how much the internet is used and the sheer volume of pages on it demands ahigh level of work and time to create them. For the efficiency of the process, weproposed a multi-model-based architecture on image captioning, consisting ofConvolutional neural network (CNN) and Long short-term memory (LSTM)models. Our proposed approach trained on our custom-made database can beautomated into assisting designers, allowing them to focus on the other morecomplicated part of the system. We trained our model in several batches overa custom-made dataset consisting of over 6300 files and were finally able toachieve a Bilingual Evaluation Understudy (BLEU) score for a batch of 50hand-drawn images at 87.86%.展开更多
This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large...This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^+ guard.ring (PGR), an n^+ guard-ring (NGR),and a deep-n-well (DNW) for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR + NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.展开更多
The research performed analysis on patent applicant ranking, IPC, patent type and legal status in order to explore application and authorization of front-end industry chain dominated by planting, breeding, soil improv...The research performed analysis on patent applicant ranking, IPC, patent type and legal status in order to explore application and authorization of front-end industry chain dominated by planting, breeding, soil improvement and substrate culti- vation technologies. The results showed that research institutions and big tobacco enterprises play a leading role in the tobacco industry, for example, Yunnan Tobac- co Agricultural S&T Research Institute and Guizhou Tobacco Agricultural S&T Re- search Institute have a total of 26 patents; A01G subclass represents 58% of total patents, dominated by Yunnan Tobacco Agricultural S&T Research Institute and Henan Agricultural University; there are only invention and practical use patents, of which invention patents represent 92%; authorized patents take up to 31% and in- valid patents represent 23%.展开更多
This paper presents a low noise, 1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications. Active inductor shunt peaking technology and...This paper presents a low noise, 1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications. Active inductor shunt peaking technology and noise optimization are used in the design of a trans-impedance amplifier,which overcomes the problem of inadequate bandwidth caused by the large parasitical capacitor of the CMOS photodiode. Experimental results indicate that with a parasitical capacitance of 2pF,this circuit works at 1.25Gb/s. A clear eye diagram is obtained with an input optical signal of - 17dBm. With a power supply of 3.3V, the front-end amplifier consumes 122mW and provides a 660mV differential output.展开更多
A novel weather radar system with distributed phased-array front-ends was developed. The specifications and preliminary data synthesis of this system are presented, which comprises one back-end and three or more front...A novel weather radar system with distributed phased-array front-ends was developed. The specifications and preliminary data synthesis of this system are presented, which comprises one back-end and three or more front-ends. Each front-end, which utilizes a phased-array digital beamforming technology, sequentially transmits four 22.5°-width beams to cover the 0°–90° elevational scan within about 0.05 s. The azimuthal detection is completed by one mechanical scan of0°–360° azimuths within about 12 s volume-scan update time. In the case of three front-ends, they are deployed according to an acute triangle to form a fine detection area(FDA). Because of the triangular deployment of multiple phased-array front-ends and a unique synchronized azimuthal scanning(SAS) rule, this new radar system is named Array Weather Radar(AWR). The back-end controls the front-ends to scan strictly in accordance with the SAS rule that assures the data time differences(DTD) among the three front-ends are less than 2 s for the same detection point in the FDA. The SAS can maintain DTD < 2 s for an expanded seven-front-end AWR. With the smallest DTD, gridded wind fields are derived from AWR data, by sampling of the interpolated grid, onto a rectangular grid of 100 m ×100 m ×100 m at a 12 s temporal resolution in the FDA. The first X-band single-polarized three-front-end AWR was deployed in field experiments in 2018 at Huanghua International Airport, China. Having completed the data synthesis and processing, the preliminary observation results of the first AWR are described herein.展开更多
This paper presents a reconfigurable RF front-end for multi-mode multi-standard(MMMS) applications. The designed RF front-end is fabricated in 0.18 μm RF CMOS technology. The low noise characteristic is achieved by t...This paper presents a reconfigurable RF front-end for multi-mode multi-standard(MMMS) applications. The designed RF front-end is fabricated in 0.18 μm RF CMOS technology. The low noise characteristic is achieved by the noise canceling technique while the bandwidth is enhanced by gate inductive peaking technique. Measurement results show that, while the input frequency ranges from 100 MHz to 2.9 GHz, the proposed reconfigurable RF front-end achieves a controllable voltage conversion gain(VCG) from 18 dB to 39 dB. The measured maximum input third intercept point(IIP3) is-4.9 dBm and the minimum noise figure(NF) is 4.6 dB. The consumed current ranges from 16 mA to 26.5 mA from a 1.8 V supply voltage. The chip occupies an area of 1.17 mm^2 including pads.展开更多
An adjustable mixer for surface acoustic wave( SAW)-less radio frequency( RF) front-end is presented in this paper. Through changing the bias voltage,the presented mixer with reconfigurable voltage conversion gain( VC...An adjustable mixer for surface acoustic wave( SAW)-less radio frequency( RF) front-end is presented in this paper. Through changing the bias voltage,the presented mixer with reconfigurable voltage conversion gain( VCG) is suitable for multi-mode multi-standard( MMMS) applications. An equivalent local oscillator( LO) frequency-tunable high-Q band-pass filter( BPF) at low noise amplifier( LNA) output is used to reject the out-of-band interference signals. Base-band( BB) capacitor of the mixer is variable to obtain 15 kinds of intermediate frequency( IF) bandwidth( BW). The proposed passive mixer with LNA is implemented in TSMC 0. 18μm RF CMOS process and operates from 0. 5 to 2. 5 GHz with measured maximum out-of-band rejection larger than 40 d B. The measured VCG of the front-end can be changed from 5 to 17 d B; the maximum input intercept point( IIP3) is0 d Bm and the minimum noise figure( NF) is 3. 7 d B. The chip occupies an area of 0. 44 mm^2 including pads.展开更多
This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise c...This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity展开更多
The 13.56 MHz analog front-end circuit for ISO/IEC 15693-compatible radio frequency identification (RFID) trans- ponder IC presented in this paper converts RF power to DC and extracts clock and data from the interroga...The 13.56 MHz analog front-end circuit for ISO/IEC 15693-compatible radio frequency identification (RFID) trans- ponder IC presented in this paper converts RF power to DC and extracts clock and data from the interrogator by 10% or 100% ASK modulation. The transponder sends data back to the interrogator by load modulation technology. The electrostatic discharge (ESD) protection circuits function to limit RF voltage to a safe level. An inductive coupling simulation modelling for 13.56 MHz RFID system is presented, with simulation results showing that the transponder operates over a wide range of electromagnetic field strength from Hmin (150 mA/m) to Hmax (5 A/m). The transponder IC is implemented in SMIC 0.35-μm three-metal two-poly mixed signal CMOS technology with embedded EEPROM.展开更多
The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET syste...The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.展开更多
In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifi...In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm. The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF, and power consumption is 1.65 mW per channel.展开更多
In medium voltage-high power(MV-HP)applications,the high switching frequency of power converter will result in unnecessary energy losses,which directly affect efficiency.To resolve this issue,a novel finite control se...In medium voltage-high power(MV-HP)applications,the high switching frequency of power converter will result in unnecessary energy losses,which directly affect efficiency.To resolve this issue,a novel finite control set-model predictive control(FCS-MPC)with low switching frequency for three-level neutral point clamped-active front-end converters(NPC-AFEs)is proposed.With this approach,the prediction model of three-level NPC-AFEs is established inα-βreference frame,and the control objective of low average switching frequency is introduced into a cost function.The proposed method not only achieves the desired control performance under low switching frequency,but also performs the efficient operation for the three-level NPC-AFEs.The simulation results are provided to verify the effectiveness of proposed control scheme.展开更多
基金supported by the Key R&D Program of Shandong Province(No.2023SFGC0101)Shandong Excellent Young Scientists Fund Program(Overseas)(No.2023HWYQ-047)+1 种基金the Natural Science Foundation of Shandong Province(No.ZR2022QA039)the National Natural Science Foundation of China(NSFC)(No.U2106202).
摘要Traditional digitizers for signal readout of PET detectors are based on commercial analog-to-digital converters(ADC).However,the cost and power consumption of an entire electronic readout system based on digitizers for a PET scanner are high.To address this problem,a soft-core ADC based on a field-programmable gate array(FPGA)was proposed.An FPGA-based ADC(FPGA-ADC)combines low loss and high performance.To achieve good performance,the FPGA-ADC requires three calibrations:time-to-digital converter(TDC)length calibration,TDC alignment calibration,and TDC-to-ADC calibration.A prototype front-end electronics based on FPGA-ADC was built to evaluate the performance of time-of-flight positron emission tomography(TOF PET)detectors.Each PET detector consists of a LYSO crystal single-ended coupled to a silicon photomultiplier(SiPM).The experimental results show that the full-width at half-maximum(FWHM)energy resolution for 511 keV gamma photons after saturation correction of the SiPM was 12.3%.The FWHM coincidence timing resolution(CTR)of the TOF PET detector with the readout of the front-end electronic prototype is 385.2 ps.FPGA-ADCbased front-end electronics are very promising for multichannel,low-cost,highly integrated,and power-efficient readout electronic systems for radiation detector applications.
基金supported by the Project of Hetao Shenzhen-Hong Kong Science and Technology Innovation Cooperation Zone(No.HZQB-KCZYB-2020083).
摘要Traditionally,a continuous-wave(CW)signal is used to simulate RF circuits during the design procedure,while the fabricated circuits are measured by modulated signals in the test phase,because modulated signals are used in reality.It is almost impossible to use a CW signal to predict system performances,such as error vector magnitude(EVM),bit error rate(BER),etc.,of a transceiver front-end when dealing with complex modulated signals.This paper develops an integrated system evaluation engine(ISEE)to evaluate the system performances of a transceiver front-end or its sub-circuits.This crossdomain simulation platform is based on Matlab,advanced design system(ADS),and Cadence simulators to link the baseband signals and transceiver frond-end.An orthogonal frequency division multiplex(OFDM)modem is implemented in Matlab for evaluating the system performances.The modulated baseband signal from Matlab is dynamically fed into ADS,which includes transceiver front-end for co-simulation.The sub-block circuits of the transceiver front-end can be implemented using ADS and Cadence simulators.After system-level circuit simulation in ADS,the output signal is dynamically delivered to Matlab for demodulation.To simplify the use of the co-simulation platform,a graphical user interface(GUI)is constructed using Matlab.The parameters of the OFDM signals can be easily reconfigured on the GUI to simulate RF circuits with different modulation schemes.To demonstrate the effectiveness of the ISEE,a 3.5 GHz power amplifier is simulated and characterized using 20 MHz 16-and 64-QAM OFDM signals.
基金funded by two 2024 Ministry of Education supply-demand docking employment and education projects(Grant No.2024101679202,Grant No.2024121116066)2024“Innovation Strong Institute Project of Guangdong Polytechnic Institute”(Grant No.2024CQ-29)2022 Guangdong Province Undergraduate Online Open Course Guidance Committee Research Project(Grant No.2022ZXKC612).
摘要In response to the pain points of rapid iteration of front-end education technology,large differences in learner foundations,and a lack of practical scenarios,this paper combines generative artificial intelligence and AI agents to analyze the empowerment logic from three dimensions:knowledge ecology reconstruction,cognitive collaborative upgrading,and teaching methodology innovation.It explores its application scenarios in teaching and learning,sorts out challenges such as technology adaptation and learning dependence,and proposes paths such as building an exclusive AI ecosystem and optimizing the guidance mechanism of intelligent agents to provide support for the digital transformation of front-end education.
摘要The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation front-end for the RF station.For that application,a general-purpose design front-end prototype has been developed to evaluate the multi-frequency point supported design feasibility.The difficult parts to achieve the requirements of the general-purpose design are reasonable device selection and balanced design.With a carefully selected low-noise wide-band RF mixer and amplifier to balance the performance of multi-frequency supported down-conversion,specially designed LO distribution net to increase isolation between adjacent channels,and external band-pass filter to realize expected up-conversion frequencies,high maintenance and modular front-end generalpurpose design has been implemented.Results of standard parameters show an R2 value of at least 99.991%in the range of-60-10 dBm for linearity,up to 18 dBm for P1dB,and up to 89 dBc for cross talk between adjacent channels.The phase noise spectrum is lower than 80 dBc in the range of 0-1 MHz;cumulative phase noise is 0.006°;and amplitude and phase stability are 0.022%and 0.034°,respectively.
摘要A front-end electronics of dose monitor has been developed for measuring irradiation dose to the patient in Shanghai Advanced Proton Therapy Facility.The parallel plate ionization chamber is used for the dose monitoring.Unlike the traditional method of recycling capacitor integration and voltage-to-frequency conversion,this dose monitor electronics uses the trans-impedance amplifier and analog-to-digital conversion method.It performs satisfactorily,with the integral nonlinearity of less than ±0.04 nA in the range of-400 to 50 nA and the resolution of about±0.6 nA.
摘要An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.
摘要A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.
基金Y.J.Ren gratefully acknowledges the financial support of the NSFC(61772280,62072249),http://gffzzf112c495998e46dehqbpxfccoxv6b6qn9.ffgz.tsg.suse.edu.cn.
摘要In the digital era,how to ensure the authenticity and integrity of elec-tronic records has become an open challenging issue.Front-end control is an important concept as well as a basic principle in electronic record management.Under the instruction of front-end control,many original management links in the record-management stage are required to move forward,and the managers enter the formation stage of the electronic records to ensure the originality.How-ever,the front-end control technique primarily focuses on transaction manage-ment,and it lacks the strategy of providing the control of electronic records.In this paper,a novel electronic record front-end control mechanism is proposed by adopting proxy re-encryption and requiring archivists to participate in the man-agement of electronic records before the record is created to solve the problem.Specifically,when an electronic record is generated,the proposed mechanism interacts with the producer of the electronic record to generate a corresponding encryption key.Moreover,electronic records are encrypted by the key to protect their confidentiality,which can prevent the leakage of electronic record informa-tion.In addition,when transferring the electronic record,archivists use proxy re-encryption technology to convert electronic records,allowing management by an archivist,ensuring their originality and authenticity.
摘要The way towards generating a website front end involves a designersettling on an idea for what kind of layout they want the website to have, thenproceeding to plan and implement each aspect one by one until they haveconverted what they initially laid out into its Html front end form, this processcan take a considerable time, especially considering the first draft of the designis traditionally never the final one. This process can take up a large amountof resource real estate, and as we have laid out in this paper, by using a Modelconsisting of various Neural Networks trained on a custom dataset. It can beautomated into assisting designers, allowing them to focus on the other morecomplicated parts of the system they are designing by quickly generating whatwould rather be straightforward busywork. Over the past 20 years, the boomin how much the internet is used and the sheer volume of pages on it demands ahigh level of work and time to create them. For the efficiency of the process, weproposed a multi-model-based architecture on image captioning, consisting ofConvolutional neural network (CNN) and Long short-term memory (LSTM)models. Our proposed approach trained on our custom-made database can beautomated into assisting designers, allowing them to focus on the other morecomplicated part of the system. We trained our model in several batches overa custom-made dataset consisting of over 6300 files and were finally able toachieve a Bilingual Evaluation Understudy (BLEU) score for a batch of 50hand-drawn images at 87.86%.
摘要This paper presents a 12-channel,30Gb/s front-end amplifier realized in standard 0.18μm CMOS technology for parallel optlc-fiber receivers. In order to overcome the problem of inadequate bandwidth caused by the large parasitical capacitor of CMOS photo-detectors,a regulated-cascode structure and noise optimization are used in the design of the transimpedance amplifier. The experimental results indicate that, with a parasitical capacitance of 2pF,a single channel is able to work at bite rates of up to 2.5Gb/s,and a clear eye diagram is obtained with a 0. 8mVpp input. Furthermore, an isolation structure combined with a p^+ guard.ring (PGR), an n^+ guard-ring (NGR),and a deep-n-well (DNW) for parallel amplifier is also presented. Taking this combined structure, the crosstalk and the substrate noise coupling have been effectively reduced. Compared with the isolation of PGR or PGR + NGR,the measured results show that the isolation degree of this structure is improved by 29.2 and 8. ldB at 1GHz,and by 8. 1 and 2. 5dB at 2GHz,respectively. With a 1.8V supply,each channel of the front-end amplifier consumes a DC power of 85mW,and the total power consumption of 12 channels is about 1W.
基金Supported by Early Warning Analysis of Patent for Key Industries and key Fields in Yunnan Province~~
摘要The research performed analysis on patent applicant ranking, IPC, patent type and legal status in order to explore application and authorization of front-end industry chain dominated by planting, breeding, soil improvement and substrate culti- vation technologies. The results showed that research institutions and big tobacco enterprises play a leading role in the tobacco industry, for example, Yunnan Tobac- co Agricultural S&T Research Institute and Guizhou Tobacco Agricultural S&T Re- search Institute have a total of 26 patents; A01G subclass represents 58% of total patents, dominated by Yunnan Tobacco Agricultural S&T Research Institute and Henan Agricultural University; there are only invention and practical use patents, of which invention patents represent 92%; authorized patents take up to 31% and in- valid patents represent 23%.
摘要This paper presents a low noise, 1.25Gb/s and 124dBΩ front-end amplifier that is designed and fabricated in 0.25μm CMOS technology for optical communication applications. Active inductor shunt peaking technology and noise optimization are used in the design of a trans-impedance amplifier,which overcomes the problem of inadequate bandwidth caused by the large parasitical capacitor of the CMOS photodiode. Experimental results indicate that with a parasitical capacitance of 2pF,this circuit works at 1.25Gb/s. A clear eye diagram is obtained with an input optical signal of - 17dBm. With a power supply of 3.3V, the front-end amplifier consumes 122mW and provides a 660mV differential output.
基金supported by Natural Science Foundation of China(NSFC)(Grant No.31727901)。
摘要A novel weather radar system with distributed phased-array front-ends was developed. The specifications and preliminary data synthesis of this system are presented, which comprises one back-end and three or more front-ends. Each front-end, which utilizes a phased-array digital beamforming technology, sequentially transmits four 22.5°-width beams to cover the 0°–90° elevational scan within about 0.05 s. The azimuthal detection is completed by one mechanical scan of0°–360° azimuths within about 12 s volume-scan update time. In the case of three front-ends, they are deployed according to an acute triangle to form a fine detection area(FDA). Because of the triangular deployment of multiple phased-array front-ends and a unique synchronized azimuthal scanning(SAS) rule, this new radar system is named Array Weather Radar(AWR). The back-end controls the front-ends to scan strictly in accordance with the SAS rule that assures the data time differences(DTD) among the three front-ends are less than 2 s for the same detection point in the FDA. The SAS can maintain DTD < 2 s for an expanded seven-front-end AWR. With the smallest DTD, gridded wind fields are derived from AWR data, by sampling of the interpolated grid, onto a rectangular grid of 100 m ×100 m ×100 m at a 12 s temporal resolution in the FDA. The first X-band single-polarized three-front-end AWR was deployed in field experiments in 2018 at Huanghua International Airport, China. Having completed the data synthesis and processing, the preliminary observation results of the first AWR are described herein.
基金Supported by the National Nature Science Foundation of China(No.61674037)the Priority Academic Program Development of Jiangsu Higher Education Institutions,the National Power Grid Corp Science and Technology Project(No.SGTYHT/16-JS-198)the State Grid Nanjing Power Supply Company Project(No.1701052)
摘要This paper presents a reconfigurable RF front-end for multi-mode multi-standard(MMMS) applications. The designed RF front-end is fabricated in 0.18 μm RF CMOS technology. The low noise characteristic is achieved by the noise canceling technique while the bandwidth is enhanced by gate inductive peaking technique. Measurement results show that, while the input frequency ranges from 100 MHz to 2.9 GHz, the proposed reconfigurable RF front-end achieves a controllable voltage conversion gain(VCG) from 18 dB to 39 dB. The measured maximum input third intercept point(IIP3) is-4.9 dBm and the minimum noise figure(NF) is 4.6 dB. The consumed current ranges from 16 mA to 26.5 mA from a 1.8 V supply voltage. The chip occupies an area of 1.17 mm^2 including pads.
基金Supported by the National Basic Research Program of China(No.2010CB327404)the Priority Academic Program Development of Jiangsu Higher Education Institutions
摘要An adjustable mixer for surface acoustic wave( SAW)-less radio frequency( RF) front-end is presented in this paper. Through changing the bias voltage,the presented mixer with reconfigurable voltage conversion gain( VCG) is suitable for multi-mode multi-standard( MMMS) applications. An equivalent local oscillator( LO) frequency-tunable high-Q band-pass filter( BPF) at low noise amplifier( LNA) output is used to reject the out-of-band interference signals. Base-band( BB) capacitor of the mixer is variable to obtain 15 kinds of intermediate frequency( IF) bandwidth( BW). The proposed passive mixer with LNA is implemented in TSMC 0. 18μm RF CMOS process and operates from 0. 5 to 2. 5 GHz with measured maximum out-of-band rejection larger than 40 d B. The measured VCG of the front-end can be changed from 5 to 17 d B; the maximum input intercept point( IIP3) is0 d Bm and the minimum noise figure( NF) is 3. 7 d B. The chip occupies an area of 0. 44 mm^2 including pads.
摘要This paper describes a low-noise front-end readout circuit for CZT detectors based on TSMC 0.35 um mixed-single CMOS technology;mainly analyzes the noise model of the detector-preamplifier and presents the low-noise circuit schematic of charge sensitive preamplifier and shaper. Considering the parasitical influences, the circuit and layout-design are optimized to reduce noise. The preliminary simulation results show that, the equivalent noise charge (ENC) is 74 e﹣ (rms), noise slope is 9 e﹣/pF, power consumption is 2 mW, and non-linearity
摘要The 13.56 MHz analog front-end circuit for ISO/IEC 15693-compatible radio frequency identification (RFID) trans- ponder IC presented in this paper converts RF power to DC and extracts clock and data from the interrogator by 10% or 100% ASK modulation. The transponder sends data back to the interrogator by load modulation technology. The electrostatic discharge (ESD) protection circuits function to limit RF voltage to a safe level. An inductive coupling simulation modelling for 13.56 MHz RFID system is presented, with simulation results showing that the transponder operates over a wide range of electromagnetic field strength from Hmin (150 mA/m) to Hmax (5 A/m). The transponder IC is implemented in SMIC 0.35-μm three-metal two-poly mixed signal CMOS technology with embedded EEPROM.
摘要The architecture of a multi-channel front-end system is important for realizing a high-resolution PET system. We propose a novel front-end readout electronic system with TDC to deal with time information for PET system which can easily design the timing control. Each channel consists of a charge preamplifier, slow/fast shaper, discriminator and an analog memory. There are an ADC and a TDC to process the energy information and time information for each channel at the same time. In this paper, the whole system signals flow is all simulated by MATLAB. The simulation results show that the proposed system can process slender current from the detector and achieve the energy and time information. The proposed architecture can be applied to high-resolution PET imaging systems with multi-channel ASICs.
摘要In this paper, the design of a novel low-noise front-end readout circuit for Cadmium zinc telluride (CdZnTe) X-ray and γ-ray detectors is described. The front-end readout circuits include the charge sensitive amplifier (CSA) and the CR-RC shaper is implemented in TSMC 0.35 μm mixed-signal CMOS technology. The die size of the prototype chip is 4.9 mm × 2.2 mm. The simulation results show that, the noise performance is 46 electrons + 10 electrons/pF, and power consumption is 1.65 mW per channel.
摘要In medium voltage-high power(MV-HP)applications,the high switching frequency of power converter will result in unnecessary energy losses,which directly affect efficiency.To resolve this issue,a novel finite control set-model predictive control(FCS-MPC)with low switching frequency for three-level neutral point clamped-active front-end converters(NPC-AFEs)is proposed.With this approach,the prediction model of three-level NPC-AFEs is established inα-βreference frame,and the control objective of low average switching frequency is introduced into a cost function.The proposed method not only achieves the desired control performance under low switching frequency,but also performs the efficient operation for the three-level NPC-AFEs.The simulation results are provided to verify the effectiveness of proposed control scheme.