Two types of handshaking circuits are proposed to implement the asynchronous communication between two processing elements in the wavefront array processors. After correcting the flaws in the original design, these ci...Two types of handshaking circuits are proposed to implement the asynchronous communication between two processing elements in the wavefront array processors. After correcting the flaws in the original design, these circuits make the system more robust and flexible. These circuits have compact architectures and are of higher performance. Besides, compared with other handshaking circuits, these designs are more suitable for FPGA.展开更多
An asynchronous wrapper with novel handshake circuits for data communication in globally asynchronous locally synchronous (GALS) systems is proposed. The handshake circuits include two communication ports and a loca...An asynchronous wrapper with novel handshake circuits for data communication in globally asynchronous locally synchronous (GALS) systems is proposed. The handshake circuits include two communication ports and a local clock generator. Two approaches for the implementation of communication ports are presented, one with pure standard cells and the others with Mttller-C elements. The detailed design methodology for GALS systems is given and the circuits are validated with VHDL and circuits simulation in standard CMOS technology.展开更多
摘要Two types of handshaking circuits are proposed to implement the asynchronous communication between two processing elements in the wavefront array processors. After correcting the flaws in the original design, these circuits make the system more robust and flexible. These circuits have compact architectures and are of higher performance. Besides, compared with other handshaking circuits, these designs are more suitable for FPGA.
摘要An asynchronous wrapper with novel handshake circuits for data communication in globally asynchronous locally synchronous (GALS) systems is proposed. The handshake circuits include two communication ports and a local clock generator. Two approaches for the implementation of communication ports are presented, one with pure standard cells and the others with Mttller-C elements. The detailed design methodology for GALS systems is given and the circuits are validated with VHDL and circuits simulation in standard CMOS technology.