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Dynamic Power Dissipation Control Method for Real-Time Processors Based on Hardware Multithreading 认领 引用
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作者 罗新强 齐悦 +1 位作者 王磊 王沁 《China Communications》 SCIE CSCD 2013年第5期156-166,共11页
In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware m... In order to eliminate the energy waste caused by the traditional static hardware multithreaded processor used in real-time embedded system working in the low workload situation, the energy efficiency of the hardware multithread is discussed and a novel dynamic multithreaded architecture is proposed. The proposed architecture saves the energy wasted by removing idle threads without manipulation on the original architecture, fulfills a seamless switching mechanism which protects active threads and avoids pipeline stall during power mode switching. The report of an implemented dynamic multithreaded processor with 45 nm process from synthesis tool indicates that the area of dynamic multithreaded architecture is only 2.27% higher than the static one in achieving dynamic power dissipation, and consumes 1.3% more power in the same peak performance. 展开更多
关键词 dynamic power dissipation control real-time processor hardware multithread low power design energy efficiency
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Redundant Multithreading Architecture Overview 认领 引用
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作者 YANG Hua CUI Gang LIU Hongwei YANG Xiaozong 《Wuhan University Journal of Natural Sciences》 EI CAS 2006年第6期1793-1796,共4页
To overcome the ever-increasing susceptibility to transient-fault in processors, various redundant multithreading （RMT） architectures have been proposed, which is becoming a most effective approach for detecting and... To overcome the ever-increasing susceptibility to transient-fault in processors, various redundant multithreading （RMT） architectures have been proposed, which is becoming a most effective approach for detecting and recovering from transient-fault. This paper surveys a wide range of RMT architectures-from the original AR-SMT（A-stream R-stream Simultaneous MultiThreading） to the most-recent SD-SRT （Slack-Decode Simultaneous Redundant Threading）, presenting traverse analyses and comparisons among them, and hereby demonstrates its evolution and tendency. Finally, some directions and suggestions are put forward for the further RMT research and development. 展开更多
关键词 redundant multithreading processor reliability
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Simultaneous Multithreading Fault Tolerance Processor 认领 引用
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作者 DONGLan HUMing-zeng +3 位作者 JIZhen-zhou CUIGuang-zuo TANGXin-min HEFeng 《Wuhan University Journal of Natural Sciences》 EI CAS 2005年第1期17-20,共4页
Transient fault detection mechanism is added to simultaneous multithreading architecture. By exploiting both ILP (Instruction Level Parallelism) and TLP (Thread Level Parallelism), Simultaneous Multithreading (SMT) Fa... Transient fault detection mechanism is added to simultaneous multithreading architecture. By exploiting both ILP (Instruction Level Parallelism) and TLP (Thread Level Parallelism), Simultaneous Multithreading (SMT) Fault Tolerance Processor can be expected to achieve better tradeoff between performance and hardware cost than traditional Fault Tolerance Processors. Detailed simulations of 3 of SPEC95 benchmarks show that executing two redundant programs on the fault-tolerant microarchitecture takes only 40%–61%longer than running a single version of the program. The new instruction fetch algorithm enhances the performance by 0.4%～1%to most of the benchmarks we choose randomly. 展开更多
关键词 Key words simultaneous multithreading rault tolerance TLP (Thread Level Parallelism) fetch policy
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The Serial Communication Based on Multithreading Technique of Windows 认领 引用 被引量：2
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作者 Chen Shu-zhen Shi Bo 《Wuhan University Journal of Natural Sciences》 EI CAS 2000年第3期328-328,共1页
Present a kind of method which is used to communicate between serial serial port and peripheral equipment dynamicly and real-time using multithreading technique based on the basic principle of communication and multit... Present a kind of method which is used to communicate between serial serial port and peripheral equipment dynamicly and real-time using multithreading technique based on the basic principle of communication and multitasking mechanism in the circumstance of Windows. This method resolves the question of Real-time answering in the serial communication validly, reduces losing rate of data and improves reliability of system. This article presents a general method used in the serial communication which is practical. 展开更多
关键词 multithreading serial communication real-time query
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A Multithreaded CGRA for Convolutional Neural Network Processing 认领 引用 被引量：2
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作者 Kota Ando Shinya Takamaeda-Yamazaki +2 位作者 Masayuki Ikebe Tetsuya Asai Masato Motomura 《Circuits and Systems》 2017年第6期149-170,共22页
Convolutional neural network (CNN) is an essential model to achieve high accuracy in various machine learning applications, such as image recognition and natural language processing. One of the important issues for CN... Convolutional neural network (CNN) is an essential model to achieve high accuracy in various machine learning applications, such as image recognition and natural language processing. One of the important issues for CNN acceleration with high energy efficiency and processing performance is efficient data reuse by exploiting the inherent data locality. In this paper, we propose a novel CGRA (Coarse Grained Reconfigurable Array) architecture with time-domain multithreading for exploiting input data locality. The multithreading on each processing element enables the input data reusing through multiple computation periods. This paper presents the accelerator design performance analysis of the proposed architecture. We examine the structure of memory subsystems, as well as the architecture of the computing array, to supply required data with minimal performance overhead. We explore efficient architecture design alternatives based on the characteristics of modern CNN configurations. The evaluation results show that the available bandwidth of the external memory can be utilized efficiently when the output plane is wider (in earlier layers of many CNNs) while the input data locality can be utilized maximally when the number of output channel is larger (in later layers). 展开更多
关键词 CNN Convolutional Neural Network Deep Learning Multithreaded Architecture CGRA
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An Efficient and Flexible Deterministic Framework for Multithreaded Programs 认领 引用 被引量：1
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作者 卢凯 周旭 +2 位作者 王小平 Tom Bergan 陈沉 《Journal of Computer Science & Technology》 SCIE EI CSCD 2015年第1期42-56,共15页
Determinism is very useful to multithreaded programs in debugging, testing, etc. Many deterministic ap- proaches have been proposed, such as deterministic multithreading （DMT） and deterministic replay. However, thes... Determinism is very useful to multithreaded programs in debugging, testing, etc. Many deterministic ap- proaches have been proposed, such as deterministic multithreading （DMT） and deterministic replay. However, these sys- tems either are inefficient or target a single purpose, which is not flexible. In this paper, we propose an efficient and flexible deterministic framework for multithreaded programs. Our framework implements determinism in two steps： relaxed determinism and strong determinism. Relaxed determinism solves data races eificiently by using a proper weak memory consistency model. After that, we implement strong determinism by solving lock contentions deterministically. Since we can apply different approaches for these two steps independently, our framework provides a spectrum of deterministic choices, including nondeterministic system （fast）, weak deterministic system （fast and conditionally deterministic）, DMT system, and deternfinistic replay system. Our evaluation shows that the DMT configuration of this framework could even outperform a state-of-the-art DMT system. 展开更多
关键词 determinism multithreading framework flexible
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基于数字孪生技术的多线程网络通信延迟估计 认领 引用
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作者 南作用 钟志刚 +1 位作者 陈任翔 王亚 《微型电脑应用》 2026年第5期145-148,153,共4页
多线程网络通信延迟类型多样化,导致队列延迟和传输延迟估计难度增加,因此提出基于数字孪生技术的多线程网络通信延迟估计方法。利用数字孪生技术构建多线程网络拓扑,利用多线程网络拓扑检测多线程网络通信信号。结合通信信号队列延迟... 多线程网络通信延迟类型多样化,导致队列延迟和传输延迟估计难度增加,因此提出基于数字孪生技术的多线程网络通信延迟估计方法。利用数字孪生技术构建多线程网络拓扑,利用多线程网络拓扑检测多线程网络通信信号。结合通信信号队列延迟和传输延迟构建通信延迟估计模糊矩阵,使用模糊一致性估计方法对模糊矩阵数据集进行训练,从而得到多线程网络通信延迟估计结果。实验结果表明,所提出的方法在互调干扰和同频干扰条件下信号检测误差小,多线程网络通信抖动值与实际值基本一致,多线程网络通信延迟估计精度高,具有较高的实际应用价值。 展开更多
关键词 数字孪生技术 多线程 网络通信 延迟估计 模糊矩阵
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Chip Multithreaded Consistency Model 认领 引用
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作者 李祖松 郇丹丹 +1 位作者 胡伟武 唐志敏 《Journal of Computer Science & Technology》 SCIE EI 2008年第2期298-304,F0003,共7页
Multithreaded technique is the developing trend of high performance processor. Memory consistency model is essential to the correctness, performance and complexity of multithreaded processor. The chip multithreaded co... Multithreaded technique is the developing trend of high performance processor. Memory consistency model is essential to the correctness, performance and complexity of multithreaded processor. The chip multithreaded consistency model adapting to multithreaded processor is proposed in this paper. The restriction imposed on memory event ordering by chip multithreaded consistency is presented and formalized. With the idea of critical cycle built by Wei-Wu Hu, we prove that the proposed chip multithreaded consistency model satisfies the criterion of correct execution of sequential consistency model. Chip multithreaded consistency model provides a way of achieving high performance compared with sequential consistency model and easures the compatibility of software that the execution result in multithreaded processor is the same as the execution result in uniprocessor. The implementation strategy of chip multithreaded consistency model in Godson-2 SMT processor is also proposed. Godson-2 SMT processor supports chip multithreaded consistency model correctly by exception scheme based on the sequential memory access queue of each thread. 展开更多
关键词 computer architecture Godson-2 multithreading memory consistency model event ordering
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Optimization of thread partitioning parameters in speculative multithreading based on artificial immune algorithm 认领 引用 被引量：2
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作者 Yu-xiang LI Yin-liang ZHAO +1 位作者 Bin LIU Shuo JI 《Frontiers of Information Technology & Electronic Engineering》 SCIE EI CSCD 2015年第3期205-216,共12页
Thread partition plays an important role in speculative multithreading （SpMT） for automatic parallelization of ir- regular programs. Using unified values of partition parameters to partition different applications l... Thread partition plays an important role in speculative multithreading （SpMT） for automatic parallelization of ir- regular programs. Using unified values of partition parameters to partition different applications leads to the fact that every ap- plication cannot own its optimal partition scheme. In this paper, five parameters affecting thread partition are extracted from heuristic rules. They are the dependence threshold （DT）, lower limit of thread size （TSL）, upper limit of thread size （TSU）, lower limit of spawning distance （SDL）, and upper limit of spawning distance （SDU）. Their ranges are determined in accordance with heuristic rules, and their step-sizes are set empirically. Under the condition of setting speedup as an objective function, all com- binations of five threshold values form the solution space, and our aim is to search for the best combination to obtain the best thread granularity, thread dependence, and spawning distance, so that every application has its best partition scheme. The issue can be attributed to a single objective optimization problem. We use the artificial immune algorithm （AIA） to search for the optimal solution. On Prophet, which is a generic SpMT processor to evaluate the performance of multithreaded programs, Olden bench- marks are used to implement the process. Experiments show that we can obtain the optimal parameter values for every benchmark, and Olden benchmarks partitioned with the optimized parameter values deliver a performance improvement of 3.00% on a 4-core platform compared with a machine learning based approach, and 8.92% compared with a heuristics-based approach. 展开更多
关键词 Speculative multithreading Thread partitioning Artificial immune algorithm
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基于实时图像处理的气溶胶粒径分布原位在线分析 认领 引用
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作者 卢云春 王燕 +3 位作者 张礁石 伍德侠 刘建国 桂华侨 《中国环境科学》 EI CAS CSCD 北大核心 2026年第8期4155-4168,共14页
电迁移成像粒径谱仪(FIMS)主要用于大气气溶胶粒径分布的高时间分辨率测量,但目前其数据处理依赖离线分析,难以满足实时测量分析和在线诊断等需求.本文基于实时图像处理算法,建立了FIMS实时在线分析方法,在连续数据流条件下实现多源异... 电迁移成像粒径谱仪(FIMS)主要用于大气气溶胶粒径分布的高时间分辨率测量,但目前其数据处理依赖离线分析,难以满足实时测量分析和在线诊断等需求.本文基于实时图像处理算法,建立了FIMS实时在线分析方法,在连续数据流条件下实现多源异步数据的实时同步,并通过系统延迟调优策略对粒子停留时间差异进行校正,实现了10~600nm气溶胶粒径分布的实时在线反演.实验结果表明,多分散气溶胶测量条件下,实时图像处理得到的粒子像素信息与离线处理结果匹配准确率达99.96%,在线与离线反演粒径分布的平均余弦相似度和皮尔逊相关系数分别为99.48%和98.60%,粒子丢失率低至0.17%,证实本文提出的FIMS实时在线分析方法可实时、准确反演气溶胶粒径分布,实现了1Hz时间分辨率的气溶胶粒径分布实时测量和数据反演可视化.误差分析结果表明,在线和离线反演结果的小幅偏差主要来源于软件数值精度、插值误差及粒子分类不确定性等.该方法突破了现有FIMS系统先测量、后分析的时效瓶颈,为基于移动平台的气溶胶粒径分布现场监测和实时分析提供了技术支撑. 展开更多
关键词 气溶胶粒径分布 电迁移成像粒径谱仪(FIMS) 实时图像处理 多线程架构 粒子检测算法
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基于自适应悬挂与伪多线程架构的全地形移动机器人系统设计 认领 引用
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作者 李荣炜 王泽莹 +2 位作者 刘奕涵 秦健豪 石龙逸 《自动化与仪表》 2026年第4期44-48,55,共5页
该文设计并实现了一种基于自适应悬挂与伪多线程架构的全地形移动机器人系统,具备在复杂环境下自主导航、避障与物资运输能力。机器人采用创新的4+4全地形悬挂底盘结构与多连杆轻量化机械臂,显著提升了地形适应性与运动性能,同时降低了... 该文设计并实现了一种基于自适应悬挂与伪多线程架构的全地形移动机器人系统,具备在复杂环境下自主导航、避障与物资运输能力。机器人采用创新的4+4全地形悬挂底盘结构与多连杆轻量化机械臂,显著提升了地形适应性与运动性能,同时降低了制造成本与自重。硬件系统设计了阶梯式降压电源电路与CAN总线通信接口,保障了系统的稳定运行。软件系统采用基于超级循环与有限状态机的伪多线程架构,实现了多传感器数据的高效处理与实时控制。实验结果表明,该机器人在多种恶劣地形下均表现出良好的通过性与操作稳定性,达到了设计目标,适用于防灾救灾、军事运输等高危环境下的自动化作业。 展开更多
关键词 全地形移动机器人 4+4悬挂 伪多线程 多连杆机械臂
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Hardwired Logic and Multithread Design in Network Processors 认领 引用
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作者 李旭东 徐扬 +1 位作者 刘斌 王小军 《Tsinghua Science and Technology》 EI CAS 2004年第2期207-212,共6页
High-performance network processors are expected to play an important role in future high-speed routers. This paper focuses on two representative techniques needed for high-performance network processors: hardwired lo... High-performance network processors are expected to play an important role in future high-speed routers. This paper focuses on two representative techniques needed for high-performance network processors: hardwired logic design and multithread design. Using hardwired logic, this paper compares a single-thread design with a multithread design, and proposes general models and principles to analyze the clock frequency and the resource cost for these environments. Then, two IP header processing schemes, one in single-thread mode and the other in double-thread mode, are developed using these principles and the implementation results verified the theoretical calculation. 展开更多
关键词 network processor (NP) hardwired logic multithread IP header processing
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面向多线程应用的智能缓存分配方法 认领 引用
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作者 何铭健 王桦 《计算机研究与发展》 EI CSCD 北大核心 2026年第1期15-27,共13页
多线程编程模型被广泛用于促进多核上的应用程序执行。然而,并发执行的线程对最后一级缓存(last level cache,LLC)的竞争造成的干扰可能会导致性能下降。英特尔缓存分配技术(cache allocation technology,CAT)提供了一种机制为不同线程... 多线程编程模型被广泛用于促进多核上的应用程序执行。然而,并发执行的线程对最后一级缓存(last level cache,LLC)的竞争造成的干扰可能会导致性能下降。英特尔缓存分配技术(cache allocation technology,CAT)提供了一种机制为不同线程实时分配缓存。然而,有2个原因导致现有分配方法并不适用于多线程应用。首先,它们是为多应用场景量身定制的,而不是为涉及多个相关线程的单个多线程应用场景设计的。其次,它们旨在提高每周期指令数(instruction per cycle,IPC),这不是一个在多线程场景中合适的性能指标。为了解决这个问题,提出了LPart,这是一种用于多线程应用程序的智能缓存分配技术,通过分配缓存显著提高了系统的吞吐量。LPart利用深度强化学习为应用程序中的不同线程分配适当数量的缓存空间。在微基准测试、Redis、商用分布式存储系统和多种应用场景上评估LPart的实验结果表明,与默认配置相比,LPart分别实现了26.9%,8.1%,9.8%,24.1%的性能提升。 展开更多
关键词 缓存分配 多核架构 多线程应用 深度强化学习 资源分配
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PsmArena:Partitioned Shared Memory for NUMA-Awareness in Multithreaded Scientific Applications 认领 引用
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作者 Zhang Yang Aiqing Zhang Zeyao Mo 《Tsinghua Science and Technology》 SCIE EI CAS CSCD 2021年第3期287-295,共9页
The Distributed Shared Memory(DSM)architecture is widely used in today’s computer design to mitigate the ever-widening processing-memory gap,and it inevitably exhibits Non-Uniform Memory Access(NUMA)to shared-memory ... The Distributed Shared Memory(DSM)architecture is widely used in today’s computer design to mitigate the ever-widening processing-memory gap,and it inevitably exhibits Non-Uniform Memory Access(NUMA)to shared-memory parallel applications.Failure to adapt to the NUMA effect can significantly downgrade application performance,especially on today’s manycore platforms with tens to hundreds of cores.However,traditional approaches such as first-touch and memory policy fall short in false page-sharing,fragmentation,or ease of use.In this paper,we propose a partitioned shared-memory approach that allows multithreaded applications to achieve full NUMA-awareness with only minor code changes and develop an accompanying NUMA-aware heap manager which eliminates false page-sharing and minimizes fragmentation.Experiments on a 256-core cc-NUMA computing node show that the proposed approach helps applications to adapt to NUMA with only minor code changes and improves the performance of typical multithreaded scientific applications by up to 4.3 folds with the increased use of cores. 展开更多
关键词 partitioned shared memory Non-Uniform Memory Access(NUMA) heap manager multithread manycore
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BIM Base软件在工程算量中精确性与效率提升的研究 认领 引用
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作者 李东霖 张莲珠 李杰 《赤峰学院学报（自然科学版）》 2026年第1期25-31,共7页
本研究针对传统工程算量方法效率低、误差大等问题,探讨基于国产自主BIM Base平台的工程算量软件在提升建筑工程算量精确性与效率中的应用价值。通过理论分析与案例验证,表明该软件采用拓扑关系重建算法和图形相交技术,解决了异形构件... 本研究针对传统工程算量方法效率低、误差大等问题,探讨基于国产自主BIM Base平台的工程算量软件在提升建筑工程算量精确性与效率中的应用价值。通过理论分析与案例验证,表明该软件采用拓扑关系重建算法和图形相交技术,解决了异形构件扣减规则模糊问题,将复杂节点(如梁柱交接)工程量误差压缩至0.5%以内;结合矩阵变换技术优化模型调整流程,利用四叉树图形索引提升空间检索效率,并通过多线程并行计算使算量速度较单线程软件提高5倍以上。案例证明,其碰撞检测功能可规避设计冲突,钢筋避让规则使钢筋算量误差趋近于零,安装算量误差降至0.5%以内,整体效率提升80%以上。研究证实,基于BIM Base平台的自主算量软件能打通“设计—深化—算量—施工”全链条数据传递,推动建筑业数字化转型升级。 展开更多
关键词 BIM Base平台 工程算量 拓扑重建 矩阵变换 多线程计算
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面向多线程并行连接的网络自适应参数配置研究 认领 引用
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作者 范泽森 何冠锦 +1 位作者 廖璇 王健生 《微型电脑应用》 2026年第3期231-235,共5页
多线程并行连接网络中各个节点和线程之间存在复杂的互动关系,而且网络环境和线程需求会发生变化,例如网络负载、用户数量的变化等,使得传统方法参数配置的能量消耗较大。为此,提出面向多线程并行连接的网络自适应参数配置方法。根据多... 多线程并行连接网络中各个节点和线程之间存在复杂的互动关系,而且网络环境和线程需求会发生变化,例如网络负载、用户数量的变化等,使得传统方法参数配置的能量消耗较大。为此,提出面向多线程并行连接的网络自适应参数配置方法。根据多线程网络设备并行连接方式,以网络资源利用率、最大链路利用率、能量消耗为指标,构建目标函数,建立网络自适应参数配置模型,通过正交遗传算法求解参数配置结果。实验结果表明,所提出的方法能有效提升网络的链路利用率和平均带宽利用率,平均带宽利用率提升了24.53%,分组投递率(PDR)保持在0.9以上,且在不同负载下能量消耗一直处于3 kW以下。 展开更多
关键词 多线程 自适应参数配置 并行连接网络 目标函数
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Multithread纤细网络支撑设计书桌 认领 引用
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《航空港》 2012年第7期42-42,共1页
"multithread"系列的每件家具都是从一个水平面开始的一一这个面可以是桌面,架子,书桌等等——它由一个连接杆组成的纤细网络支撑。这件产品是由慕尼黑和斯德哥尔摩事务所kram/weisshaar(reed
关键词 支撑设计 Multithread 连接杆 逻辑系统 物理模拟技术 支撑力量
CPU+GPU并行加速的星链信号实时高精度频率估计算法 认领 引用 被引量：1
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作者 代传金 秦培杰 +1 位作者 李林 臧博 《航空学报》 EI CAS CSCD 北大核心 2025年第24期215-228,共14页
星链下行信号实时高精度频率估计算法设计与实现是LEO卫星动态机会导航工程应用的关键技术。针对传统极大似然估计、频域滑窗估计及卡尔曼滤波等算法在低信噪比星链信号捕获中鲁棒性差、实时性不足的问题,提出多子载波联合频偏估计(MC-J... 星链下行信号实时高精度频率估计算法设计与实现是LEO卫星动态机会导航工程应用的关键技术。针对传统极大似然估计、频域滑窗估计及卡尔曼滤波等算法在低信噪比星链信号捕获中鲁棒性差、实时性不足的问题,提出多子载波联合频偏估计(MC-JFE)算法,通过深度挖掘信号多子载波结构特征,联合优化载波频率与频率间隔参数,提升频率估计精度与实时性。为突破MC-JFE算法工程应用中密集计算瓶颈,创新构建了一种CPU+GPU异构并行的加速处理架构,通过协同调度CPU逻辑控制与GPU大规模并行计算能力,算法执行效率实现超一个数量级提升。为验证设计算法的理论与技术实现有效性,基于半实物仿真平台生成的星链下行信标数据,开展了5978颗星链卫星信号实时频率估计试验,并结合我国边境地区实测信号进行多普勒估计算法对比研究。结果表明:所提出的MC-JFE算法在−10~10 dB全信噪比范围内保持最低估计误差边界,估计精度提升50%以上(0 dB);通过相位信息融合机制,在部分子载波中断时维持稳定输出;基于CUDA最优线程块配置的CPU+GPU异构架构,加速比峰值达47倍,较传统CPU方案提升2.8倍,且精度与加速比呈正相关特性,为LEO卫星动态机会导航提供了高可靠、强实时的频率估计技术支撑,具有重要工程应用价值。 展开更多
关键词 星链下行信号 高精度频率估计 CPU+GPU异构 并行加速 多线程处理
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基于ROS-QT的红花采摘机器人多线程传感器数据预处理系统 认领 引用 被引量：1
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作者 郭辉 王翔 +1 位作者 武天伦 杨春天 《沈阳农业大学学报》 CAS CSCD 北大核心 2025年第1期117-127,共11页
[目的]针对红花采摘机器人在复杂农田环境中面临的实时感知与控制挑战,特别是多源异构传感器数据处理和对环境变化的快速响应问题,设计一种基于ROS和Qt的多线程并行控制系统。[方法]数据处理引入生产者-消费者模型,实现多源异构传感器... [目的]针对红花采摘机器人在复杂农田环境中面临的实时感知与控制挑战,特别是多源异构传感器数据处理和对环境变化的快速响应问题,设计一种基于ROS和Qt的多线程并行控制系统。[方法]数据处理引入生产者-消费者模型,实现多源异构传感器数据的实时并行处理,提高系统数据处理效率和鲁棒性,并在新疆吉木萨尔县红旗农场红花田现场试验。[结果]多线程架构在复杂场景中显著优化资源利用率,减少端到端延迟约19.3%~25%。通过任务分解与并行处理,多线程配置在高负载条件下将CPU使用率从单线程的90%降低至75%~80%,并显著平滑内存曲线,提升系统稳定性。[结论]该项目与新疆35家农户、合作社签订技术服务合作协议,对推动红花采摘机械化发展具有重要的理论和实践意义。 展开更多
关键词 红花采摘机器人 多线程控制系统 并行数据处理 并行控制
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面向远距飞机目标跟踪方法的研究 认领 引用
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作者 高瑞贞 许睿烁 +1 位作者 赵子月 夏自强 《机械设计与制造》 北大核心 2025年第2期175-178,182,共4页
针对飞行速度快,空间跨度大,观察视角变化大的飞机起降过程,提出了一种基于视觉的远距飞机目标跟踪方法。该方法在没有雷达、对焦传感器等硬件的情况下,仅需要对摄像机的采集画面进行图像分析,通过对分析结果的进一步处理,实现对云台和... 针对飞行速度快,空间跨度大,观察视角变化大的飞机起降过程,提出了一种基于视觉的远距飞机目标跟踪方法。该方法在没有雷达、对焦传感器等硬件的情况下,仅需要对摄像机的采集画面进行图像分析,通过对分析结果的进一步处理,实现对云台和变焦镜头的实时控制,使得飞机目标在起降过程中始终保持在摄像机的图像中心,同时大大降低了成本。为此,首先对相机成像规律、变焦镜头变焦规律进行建模。然后,采用YOLOv4目标检测算法对飞机进行目标检测,并对目标进行图像分析,得到目标在相机中的几何规律和位置关系。在此基础上,采用图像清晰度评价方法对变焦镜头进行自动变焦、自动对焦控制,并基于卡尔曼滤波器对云台的跟踪控制进行了优化。理论分析与实验结果表明,在没有雷达、对焦传感器等硬件的情况下,基于视觉的远距飞机目标跟踪方法可以使飞机目标始终保持在图像中心。 展开更多
关键词 目标跟踪 云台控制 卡尔曼滤波 自动对焦 多线程
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