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Study on the aided PC-ASCL decoding algorithm based on optimized parity check codes 认领 引用
1
作者 Jianguo YUAN Deyi YANG +1 位作者 Ziliang ZHU Jinneng XIANG 《Optoelectronics Letters》 EI 2026年第2期87-91,共5页
Aiming at the poor performance of the parity check(PC) aided adaptive successive cancellation list(PC-ASCL) decoding algorithm because the PC code in the polar code can only verify odd errors, an optimized parity chec... Aiming at the poor performance of the parity check(PC) aided adaptive successive cancellation list(PC-ASCL) decoding algorithm because the PC code in the polar code can only verify odd errors, an optimized parity check(OPC) code which can verify all odd errors as well as the half even errors is proposed. The OPC code is used to improve the PC-ASCL decoding algorithm, thus an OPC aided ASCL(OPC-ASCL) decoding algorithm is proposed. In the coding stage, the algorithm divides the information sequence into multiple segments, and places an OPC code at the end of each segment to verify the current information sequence, and places a cyclic redundancy check code at the end of the entire information sequence to verify the entire information sequence. In the decoding stage, the algorithm uses the OPC-ASCL decoder to decode. Simulation results show that compared to the PC-ASCL decoding algorithm, the OPC-ASCL decoding algorithm can reduce the complexity and obtain the certain performance gain. 展开更多
关键词 pc ascl decoding pc code adaptive successive cancellation list pc ascl divides information sequence multip parity check polar code optimized parity check coding stage
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Multi-Attempt List Decoding of Polar Codes 认领 引用
2
作者 Yuan Peihong Chen Zhe +1 位作者 Wu Yongpeng Gao Yue 《China Communications》 SCIE EI CSCD 2026年第4期27-36,共10页
In this work,we propose a multi-attempt successive cancellation list(MA-SCL)decoder for polar codes that achieves identical error-correction performance to standard SCL decoding while reducing average complexity.Unlik... In this work,we propose a multi-attempt successive cancellation list(MA-SCL)decoder for polar codes that achieves identical error-correction performance to standard SCL decoding while reducing average complexity.Unlike CRC-aided SCL,the proposed MA-SCL progressively restarts decoding with increasing list sizes and reuses information from previous attempts.This design eliminates the need for outer CRC codes.The decoder features dynamic searchspace pruning and an early stopping criterion based on path metrics.Simulations show MA-SCL matches SCL performance with lower average complexity,particularly for short polar-like codes with reed-muller(RM)rate profiles and dynamic frozen constraints.Compared to existing adaptive decoders,MA-SCL offers implementation advantages by eliminating the need for stack-/heap management while providing relatively stable latency bounds(1×to|Λ|×SCL latency). 展开更多
关键词 complexity-adaptive decoding list decoding polar coding
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Global receptive field transformer decoder method on quantum surface code data and syndrome error correction 认领 引用 被引量：1
3
作者 Ao-Qing Li Ce-Wen Tian +2 位作者 Xiao-Xuan Xu Hong-Yang Ma Jun-Qing Liang 《Chinese Physics B》 SCIE EI CAS CSCD 2025年第3期267-276,共10页
Quantum computing has the potential to solve complex problems that are inefficiently handled by classical computation.However,the high sensitivity of qubits to environmental interference and the high error rates in cu... Quantum computing has the potential to solve complex problems that are inefficiently handled by classical computation.However,the high sensitivity of qubits to environmental interference and the high error rates in current quantum devices exceed the error correction thresholds required for effective algorithm execution.Therefore,quantum error correction technology is crucial to achieving reliable quantum computing.In this work,we study a topological surface code with a two-dimensional lattice structure that protects quantum information by introducing redundancy across multiple qubits and using syndrome qubits to detect and correct errors.However,errors can occur not only in data qubits but also in syndrome qubits,and different types of errors may generate the same syndromes,complicating the decoding task and creating a need for more efficient decoding methods.To address this challenge,we used a transformer decoder based on an attention mechanism.By mapping the surface code lattice,the decoder performs a self-attention process on all input syndromes,thereby obtaining a global receptive field.The performance of the decoder was evaluated under a phenomenological error model.Numerical results demonstrate that the decoder achieved a decoding accuracy of 93.8%.Additionally,we obtained decoding thresholds of 5%and 6.05%at maximum code distances of 7 and 9,respectively.These results indicate that the decoder used demonstrates a certain capability in correcting noise errors in surface codes. 展开更多
关键词 quantum error correction surface code transformer decoder
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A Highly Compatible Circular-Shifting Network for Partially Parallel QC-LDPC Decoder 认领 引用
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作者 Yanzhi Wang Zhenzhi Wu +2 位作者 Peipei Liu Ning Guan Hua Wang 《International Journal of Communications, Network and System Sciences》 2017年第5期24-34,共11页
The conventional methodology for designing QC-LDPC decoders is applied for fixed configurations used in wireless communication standards, and the supported largest expansion factor Z (the parallelism of the layered de... The conventional methodology for designing QC-LDPC decoders is applied for fixed configurations used in wireless communication standards, and the supported largest expansion factor Z (the parallelism of the layered decoding) is a fixed number. In this paper, we study the circular-shifting network for decoding LDPC codes with arbitrary Z factor, especially for decoding large Z (Z P) codes, where P is the decoder parallelism. By buffering the P-length slices from the memory, and assembling the shifted slices in a fixed routine, the P-parallelism shift network can process Z-parallelism circular-shifting tasks. The implementation results show that the proposed network for arbitrary sized data shifting consumes only one times of additional resource cost compared to the traditional solution for only maximum P sized data shifting, and achieves significant saving on area and routing complexity. 展开更多
关键词 Partially Parallel Layered Decoding Circular-Shifting Network QC-LDPC Decoder Arbitrary Expansion Factor
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Computation-Efficient Decoding of LDPC Codes for High-Speed Space Laser Communications 认领 引用
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作者 Hu Zhuojun Chen Zhao +1 位作者 Kuang Linling Yin Liuguo 《China Communications》 SCIE EI CSCD 2025年第12期108-123,共16页
Space laser communication(SLC)is an emerging technology to support high-throughput data transmissions in space networks.In this paper,to guarantee the reliability of high-speed SLC links,we aim at practical implementa... Space laser communication(SLC)is an emerging technology to support high-throughput data transmissions in space networks.In this paper,to guarantee the reliability of high-speed SLC links,we aim at practical implementation of low-density paritycheck(LDPC)decoding under resource-restricted space platforms.Particularly,due to the supply restriction and cost issues of high-speed on-board devices such as analog-to-digital converters(ADCs),the input of LDPC decoding will be usually constrained by hard-decision channel output.To tackle this challenge,density-evolution-based theoretical analysis is firstly performed to identify the cause of performance degradation in the conventional binaryinitialized iterative decoding(BIID)algorithm.Then,a computation-efficient decoding algorithm named multiary-initialized iterative decoding with early termination(MIID-ET)is proposed,which improves the error-correcting performance and computation efficiency by using a reliability-based initialization method and a threshold-based decoding termination rule.Finally,numerical simulations are conducted on example codes of rates 7/8 and 1/2 to evaluate the performance of different LDPC decoding algorithms,where the proposed MIID-ET outperforms the BIID with a coding gain of 0.38 dB and variable node calculation saving of 37%.With this advantage,the proposed MIID-ET can notably reduce LDPC decoder’s hardware implementation complexity under the same bit error rate performance,which successfully doubles the total throughput to 10 Gbps on a single-chip FPGA. 展开更多
关键词 computation-efficient decoding highspeed decoders LDPC codes LLR initialization space laser communications
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Low Complexity Successive Cancellation List Decoding of U-UV Codes 认领 引用
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作者 Chen Wenhao Chen Li +1 位作者 Lin Jingyu Zhang Huazi 《China Communications》 SCIE EI CSCD 2025年第1期41-60,共20页
Constituted by BCH component codes and its ordered statistics decoding(OSD),the successive cancellation list(SCL)decoding of U-UV structural codes can provide competent error-correction performance in the short-to-med... Constituted by BCH component codes and its ordered statistics decoding(OSD),the successive cancellation list(SCL)decoding of U-UV structural codes can provide competent error-correction performance in the short-to-medium length regime.However,this list decoding complexity becomes formidable as the decoding output list size increases.This is primarily incurred by the OSD.Addressing this challenge,this paper proposes the low complexity SCL decoding through reducing the complexity of component code decoding,and pruning the redundant SCL decoding paths.For the former,an efficient skipping rule is introduced for the OSD so that the higher order decoding can be skipped when they are not possible to provide a more likely codeword candidate.It is further extended to the OSD variant,the box-andmatch algorithm(BMA),in facilitating the component code decoding.Moreover,through estimating the correlation distance lower bounds(CDLBs)of the component code decoding outputs,a path pruning(PP)-SCL decoding is proposed to further facilitate the decoding of U-UV codes.In particular,its integration with the improved OSD and BMA is discussed.Simulation results show that significant complexity reduction can be achieved.Consequently,the U-UV codes can outperform the cyclic redundancy check(CRC)-polar codes with a similar decoding complexity. 展开更多
关键词 ordered statistics decoding successive cancellation list decoding U-UV codes
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Neural network-based decoding for bias-tailored quantum codes over quantum channels with asymmetric noise 认领 引用
7
作者 Jihao Fan Qianhui Zhang +1 位作者 Zhihua Zhang Jun Li 《Communications in Theoretical Physics》 SCIE CAS CSCD 2025年第12期32-42,共11页
To improve the decoding performance of quantum error-correcting codes in asymmetric noise channels,a neural network-based decoding algorithm for bias-tailored quantum codes is proposed.The algorithm consists of a bias... To improve the decoding performance of quantum error-correcting codes in asymmetric noise channels,a neural network-based decoding algorithm for bias-tailored quantum codes is proposed.The algorithm consists of a biased noise model,a neural belief propagation decoder,a convolutional optimization layer,and a multi-objective loss function.The biased noise model simulates asymmetric error generation,providing a training dataset for decoding.The neural network,leveraging dynamic weight learning and a multi-objective loss function,mitigates error degeneracy.Additionally,the convolutional optimization layer enhances early-stage convergence efficiency.Numerical results show that for bias-tailored quantum codes,our decoder performs much better than the belief propagation(BP)with ordered statistics decoding(BP+OSD).Our decoder achieves an order of magnitude improvement in the error suppression compared to higher-order BP+OSD.Furthermore,the decoding threshold of our decoder for surface codes reaches a high threshold of 20%. 展开更多
关键词 quantum error correction quantum channels asymmetric noise neural networkbased decoding bias-tailored quantum codes
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Real-Time Implementation for Reduced-Complexity LDPC Decoder in Satellite Communication 认领 引用 被引量：4
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作者 WANG Yongqing LIU Donglei +1 位作者 SUN Lida WU Siliang 《China Communications》 SCIE CSCD 2014年第12期94-104,共11页
In this paper,it has proposed a realtime implementation of low-density paritycheck(LDPC)decoder with less complexity used for satellite communication on FPGA platform.By adopting a(2048.4096)irregular quasi-cyclic(QC)... In this paper,it has proposed a realtime implementation of low-density paritycheck(LDPC)decoder with less complexity used for satellite communication on FPGA platform.By adopting a(2048.4096)irregular quasi-cyclic(QC)LDPC code,the proposed partly parallel decoding structure balances the complexity between the check node unit(CNU)and the variable node unit(VNU)based on min-sum(MS)algorithm,thereby achieving less Slice resources and superior clock performance.Moreover,as a lookup table(LUT)is utilized in this paper to search the node message stored in timeshare memory unit,it is simple to reuse and save large amount of storage resources.The implementation results on Xilinx FPGA chip illustrate that,compared with conventional structure,the proposed scheme can achieve at last 28.6%and 8%cost reduction in RAM and Slice respectively.The clock frequency is also increased to 280 MHz without decoding performance deterioration and convergence speed reduction. 展开更多
关键词 quasi—cyclic code LDPC decoder m in-sum algorithm partial parallel structure lookup table
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Determination of quantum toric error correction code threshold using convolutional neural network decoders 认领 引用 被引量：3
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作者 Hao-Wen Wang Yun-Jia Xue +2 位作者 Yu-Lin Ma Nan Hua Hong-Yang Ma 《Chinese Physics B》 SCIE EI CAS CSCD 2022年第1期136-142,共7页
Quantum error correction technology is an important solution to solve the noise interference generated during the operation of quantum computers.In order to find the best syndrome of the stabilizer code in quantum err... Quantum error correction technology is an important solution to solve the noise interference generated during the operation of quantum computers.In order to find the best syndrome of the stabilizer code in quantum error correction,we need to find a fast and close to the optimal threshold decoder.In this work,we build a convolutional neural network(CNN)decoder to correct errors in the toric code based on the system research of machine learning.We analyze and optimize various conditions that affect CNN,and use the RestNet network architecture to reduce the running time.It is shortened by 30%-40%,and we finally design an optimized algorithm for CNN decoder.In this way,the threshold accuracy of the neural network decoder is made to reach 10.8%,which is closer to the optimal threshold of about 11%.The previous threshold of 8.9%-10.3%has been slightly improved,and there is no need to verify the basic noise. 展开更多
关键词 quantum error correction toric code convolutional neural network(CNN)decoder
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High Hardware Utilization and Low Memory Block Requirement Decoding of QC-LDPC Codes 认领 引用 被引量：1
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作者 ZHAO Ling LIU Rongke +1 位作者 HOU Yi ZHANG Xiaolin 《Chinese Journal of Aeronautics》 SCIE EI CAS CSCD 2012年第5期747-756,共10页
This paper presents a simple yet effective decoding for general quasi-cyclic low-density parity-check （QC-LDPC） codes, which not only achieves high hardware utility efficiency （HUE）, but also brings about great me... This paper presents a simple yet effective decoding for general quasi-cyclic low-density parity-check （QC-LDPC） codes, which not only achieves high hardware utility efficiency （HUE）, but also brings about great memory block reduction without any performance degradation. The main idea is to split the check matrix into several row blocks, then to perform the improved mes- sage passing computations sequentially block by block. As the decoding algorithm improves, the sequential tie between the two-phase computations is broken, so that the two-phase computations can be overlapped which bring in high HUE. Two over- lapping schemes are also presented, each of which suits a different situation. In addition, an efficient memory arrangement scheme is proposed to reduce the great memory block requirement of the LDPC decoder. As an example, for the 0.4 rate LDPC code selected from Chinese Digital TV Terrestrial Broadcasting （DTTB）, our decoding saves over 80% memory blocks com- pared with the conventional decoding, and the decoder achieves 0.97 HUE. Finally, the 0.4 rate LDPC decoder is implemented on an FPGA device EP2S30 （speed grade -5）. Using 8 row processing units, the decoder can achieve a maximum net throughput of 28.5 Mbps at 20 iterations. 展开更多
关键词 wireless communication channel coding low-density parity-check （LDPC） codes decoding hardware utility effi-ciency overlapping
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Efficient VLSI architecture of CAVLC decoder with power optimized 认领 引用 被引量：3
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作者 陈光化 胡登基 +2 位作者 张金艺 郑伟峰 曾为民 《Journal of Shanghai University(English Edition)》 2009年第6期462-465,共4页
This paper presents an efficient VLSI architecture of the contest-based adaptive variable length code （CAVLC） decoder with power optimized for the H.264/advanced video coding （AVC） standard. In the proposed design... This paper presents an efficient VLSI architecture of the contest-based adaptive variable length code （CAVLC） decoder with power optimized for the H.264/advanced video coding （AVC） standard. In the proposed design, according to the regularity of the codewords, the first one detector is used to solve the low efficiency and high power dissipation problem within the traditional method of table-searching. Considering the relevance of the data used in the process of runbefore＇s decoding, arithmetic operation is combined with finite state machine （FSM）, which achieves higher decoding efficiency. According to the CAVLC decoding flow, clock gating is employed in the module level and the register level respectively, which reduces 43% of the overall dynamic power dissipation. The proposed design can decode every syntax element in one clock cycle. When the proposed design is synthesized at the clock constraint of 100 MHz, the synthesis result shows that the design costs 11 300 gates under a 0.25 μm CMOS technology, which meets the demand of real time decoding in the H.264/AVC standard. 展开更多
关键词 H.264/advanced video coding （AVC） contest-based adaptive variable length code （CAVLC） decoder
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Quantized Decoders that Maximize Mutual Information for Polar Codes 认领 引用
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作者 Zhu Hongfei Cao Zhiwei +1 位作者 Zhao Yuping Li Dou 《China Communications》 SCIE CSCD 2024年第7期125-134,共10页
In this paper,we innovatively associate the mutual information with the frame error rate(FER)performance and propose novel quantized decoders for polar codes.Based on the optimal quantizer of binary-input discrete mem... In this paper,we innovatively associate the mutual information with the frame error rate(FER)performance and propose novel quantized decoders for polar codes.Based on the optimal quantizer of binary-input discrete memoryless channels(BDMCs),the proposed decoders quantize the virtual subchannels of polar codes to maximize mutual information(MMI)between source bits and quantized symbols.The nested structure of polar codes ensures that the MMI quantization can be implemented stage by stage.Simulation results show that the proposed MMI decoders with 4 quantization bits outperform the existing nonuniform quantized decoders that minimize mean-squared error(MMSE)with 4 quantization bits,and yield even better performance than uniform MMI quantized decoders with 5 quantization bits.Furthermore,the proposed 5-bit quantized MMI decoders approach the floating-point decoders with negligible performance loss. 展开更多
关键词 maximize mutual information polar codes quantization successive cancellation decoding
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An FPGA-based LDPC decoder with optimized scale factor of NMS decoding algorithm 认领 引用
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作者 LI Jinming ZHAGN Pingping +1 位作者 WANG Lanzhu WANG Guodong 《Journal of Measurement Science and Instrumentation》 CAS CSCD 2022年第4期398-406,共9页
Considering that the hardware implementation of the normalized minimum sum(NMS)decoding algorithm for low-density parity-check(LDPC)code is difficult due to the uncertainty of scale factor,an NMS decoding algorithm wi... Considering that the hardware implementation of the normalized minimum sum(NMS)decoding algorithm for low-density parity-check(LDPC)code is difficult due to the uncertainty of scale factor,an NMS decoding algorithm with variable scale factor is proposed for the near-earth space LDPC codes(8177,7154)in the consultative committee for space data systems(CCSDS)standard.The shift characteristics of field programmable gate array(FPGA)is used to optimize the quantization data of check nodes,and finally the function of LDPC decoder is realized.The simulation and experimental results show that the designed FPGA-based LDPC decoder adopts the scaling factor in the NMS decoding algorithm to improve the decoding performance,simplify the hardware structure,accelerate the convergence speed and improve the error correction ability. 展开更多
关键词 LDPC code NMS decoding algorithm variable scale factor quantization
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Shortened PAC Codes and List Decoding 认领 引用 被引量：1
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作者 LIU Aolin FENG Bowen +2 位作者 LIANG Chulong XU Jin ZHANG Qinyu 《ZTE Communications》 2025年第4期86-96,共11页
Shortening is a standard rate-matching method for polar codes in wireless communications.Since polarization-adjusted convolu⁃tional(PAC)codes also have a block length limited to the integer powers of two,they also req... Shortening is a standard rate-matching method for polar codes in wireless communications.Since polarization-adjusted convolu⁃tional(PAC)codes also have a block length limited to the integer powers of two,they also require rate-matching.To this end,we first analyze the limitations of existing shortening patterns for PAC codes and explore their feasibility.Subsequently,we propose a novel shortening scheme for PAC codes based on list decoding,where the receiver is allowed to treat the values of the deleted bits as undetermined.This ap⁃proach uses a specialized PAC codeword and activates multiple decoding paths during the initialization of list decoding,enabling it to achieve the desired reliability. 展开更多
关键词 polarization-adjusted convolutional codes rate-matching shortened codes list decoding
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A reordered first fit algorithm based novel storage scheme for parallel turbo decoder 认领 引用
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作者 张乐 贺翔 +1 位作者 徐友云 罗汉文 《Journal of Shanghai University(English Edition)》 2007年第4期380-384,共5页
In this paper we discuss a novel storage scheme for simultaneous memory access in parallel turbo decoder. The new scheme employs vertex coloring in graph theory. Compared to a similar method that also uses unnatural o... In this paper we discuss a novel storage scheme for simultaneous memory access in parallel turbo decoder. The new scheme employs vertex coloring in graph theory. Compared to a similar method that also uses unnatural order in storage, our scheme requires 25 more memory blocks but allows a simpler configuration for variable sizes of code lengths that can be implemented on-chip. Experiment shows that for a moderate to high decoding throughput （40-100 Mbps）, the hardware cost is still affordable for 3GPP＇s （3rd generation partnership project） interleaver. 展开更多
关键词 turbo codes parallel turbo decoding interleaver vertex coloring reordered first fit algorithm （RFFA） fieldprogrammable gate array （FPGA）.
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Research on deep learning decoding method for polar codes in ACO-OFDM spatial optical communication system 认领 引用
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作者 LIU Kangrui LI Ming +2 位作者 CHEN Sizhe QU Jiashun ZHOU Ming’ou 《Optoelectronics Letters》 EI 2025年第7期427-433,共7页
Aiming at the problem that the bit error rate(BER)of asymmetrically clipped optical orthogonal frequency division multiplexing(ACO-OFDM)space optical communication system is significantly affected by different turbule... Aiming at the problem that the bit error rate(BER)of asymmetrically clipped optical orthogonal frequency division multiplexing(ACO-OFDM)space optical communication system is significantly affected by different turbulence intensities,the deep learning technique is proposed to the polarization code decoding in ACO-OFDM space optical communication system.Moreover,this system realizes the polarization code decoding and signal demodulation without frequency conduction with superior performance and robustness compared with the performance of traditional decoder.Simulations under different turbulence intensities as well as different mapping orders show that the convolutional neural network(CNN)decoder trained under weak-medium-strong turbulence atmospheric channels achieves a performance improvement of about 102compared to the conventional decoder at 4-quadrature amplitude modulation(4QAM),and the BERs for both 16QAM and 64QAM are in between those of the conventional decoder. 展开更多
关键词 frequency conduction polar codes deep learning signal demodulation deep learning technique decoding ACO OFDM polarization code decoding
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PERFORMANCE ANALYSIS AND SIMULATION OF OCDMA SYSTEM BASED ON FBGs ENCODER/DECODER 认领 引用
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作者 Li Chuanqi Sun Xiaohan Je-Myung Jeong 《Journal of Electronics(China)》 2005年第6期663-670,共8页
The encoding/decoding scheme based on Fiber Bragg Grating (FBG) for Optical Code Division Multiple Access (OCDMA) system is analyzed and the whole process from transmitting end to receiving end is researched in detail... The encoding/decoding scheme based on Fiber Bragg Grating (FBG) for Optical Code Division Multiple Access (OCDMA) system is analyzed and the whole process from transmitting end to receiving end is researched in detail. The mathematical mode including signal transmission, summing, receiving and recovering are established respectively. One of the main sources of Bit Error Rate (BER) of OCDMA system based on FBGs is the unevenness of signal power spectrum, which leads to the chip powers unequal with each other. The Signal to Interfere Ratio (SIR) and BER performance of the system are studied and simulated at the case with uneven distribution of chips' powers. 展开更多
关键词 Optical Code Division Multiple Access （OCDMA） Fiber Bragg Grating （FBG） Optical encoder/decoder
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Construction of Quasi-Cyclic Low-Density Parity-Check Codes for Simplifying Shuffle Networks in Layered Decoder 认领 引用 被引量：1
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作者 张建军 董明科 +2 位作者 王达 金野 项海格 《China Communications》 SCIE CSCD 2013年第12期102-113,共12页
Offset Shuffle Networks(OSNs) interleave a-posterior probability messages in the Block Row-Layered Decoder(BRLD) of QuasiCyclic Low-Density Parity-Check(QC-LDPC)codes.However,OSNs usually consume a significant amount ... Offset Shuffle Networks(OSNs) interleave a-posterior probability messages in the Block Row-Layered Decoder(BRLD) of QuasiCyclic Low-Density Parity-Check(QC-LDPC)codes.However,OSNs usually consume a significant amount of computational resources and limit the clock frequency,particularly when the size of the Circulant Permutation Matrix(CPM)is large.To simplify the architecture of the OSN,we propose a Simplified Offset Shuffle Network Block Progressive Edge-Growth(SOSNBPEG) algorithm to construct a class of QCLDPC codes.The SOSN-BPEG algorithm constrains the shift values of CPMs and the difference of the shift values in the same column by progressively appending check nodes.Simulation results indicate that the error performance of the SOSN-BPEG codes is the same as that of the codes in WiMAX and DVB-S2.The SOSNBPEG codes can reduce the complexity of the OSNs by up to 54.3%,and can improve the maximum frequency by up to 21.7%for various code lengths and rates. 展开更多
关键词 QC-LDPC codes construction alg-orithm PEG algorithm row-layered decoder shuffle network
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Modified Benes network architecture for WiMAX LDPC decoder 认领 引用 被引量：1
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作者 徐勐 吴建辉 张萌 《Journal of Southeast University(English Edition)》 EI CAS 2011年第2期140-143,共4页
A modified Benes network is proposed to be used as an optimal shuffle network in worldwide interoperability for microwave access （WiMAX） low density parity check （LDPC） decoders, When the size of the input is not ... A modified Benes network is proposed to be used as an optimal shuffle network in worldwide interoperability for microwave access （WiMAX） low density parity check （LDPC） decoders, When the size of the input is not a power of two, the modified Benes network can achieve the most optimal performance. This modified Benes network is non-blocking and can perform any sorts of permutations, so it can support 19 modes specified in the WiMAX system. Furthermore, an efficient algorithm to generate the control signals for all the 2 × 2 switches in this network is derived, which can reduce the hardware complexity and overall latency of the modified Benes network. Synthesis results show that the proposed control signal generator can save 25.4% chip area and the overall network latency can be reduced by 36. 2%. 展开更多
关键词 worldwide interoperability for microwave access（WiMAX） quasi-cycle low density parity check （QC-LDPC） LDPC decoder Benes network
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Efficient Polar Codes with Low Complexity for Correcting Insertions/Deletions in DPPM 认领 引用
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作者 Li Leran Liu Yuan +2 位作者 Yuan Ye Xiahou Wenqian Chen Maonan 《China Communications》 SCIE EI CSCD 2026年第1期24-33,共10页
Differential pulse-position modulation(DP PM)can achieve a good compromise between power and bandwidth requirements.However,the output sequence has undetectable insertions and deletions.This paper proposes a successiv... Differential pulse-position modulation(DP PM)can achieve a good compromise between power and bandwidth requirements.However,the output sequence has undetectable insertions and deletions.This paper proposes a successive cancellation(SC)decoding scheme based on the weighted levenshtein distance(WLD)of polar codes for correcting insertions/deletions in DPPM systems.In this method,the WLD is used to calculate the transfer probabilities recursively to obtain likelihood ratios,and the low-complexity SC decoding method is built according to the error characteristics to match the DPPM system.Additionally,the proposed SC decoding scheme is extended to list decoding,which can further improve error correction performance.Simulation results show that the proposed scheme can effectively correct insertions/deletions in the DPPM system,which enhances its reliability and performance. 展开更多
关键词 DPPM insertions/deletions polar codes SC decoding
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